1995 // Book
OKFDDs vs. OBDDs and OFDDs
Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
Becker, B.; Drechsler, R.; Theobald, M.
1995 // Journal article
On Local Transformations and the Testability of Path Delay Faults
Journal of Electronic Testing
Hengster, H.; Drechsler, R.; Becker, B.
1995 // Conference paper
On the Application of Local Circuit Transformations, with Special Emphasis on the Testability of Path-Delay Faults
Proceedings of the IEEE VLSI Test Symposium
Hengster, Harry; Drechsler, Rolf; Becker, Bernd
1995 // Journal article
On the Generation of Area-Time-Optimal Testable Adders
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Becker, B.; Drechsler, R.; Molitor, P.
1995 // Journal article
On the Relationship Between BDDs and FDDs
Information and Computation
Becker, B.; Drechsler, R.; Werchner, R.
1995 // Book
On the Relationship Between BDDs and FDDs: Extended Abstract
Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
Becker, B.; Drechsler, R.; Werchner, R.
1995 // Conference paper
On Variable Ordering and the Choice of Decomposition Type in OKFDDs
Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC
Drechsler, Rolf; Becker, Bernd; Jahnke, Andrea
1995 // Conference paper
Random Pattern Fault Simulation in Multi-Valued Circuits
Proceedings of The International Symposium on Multiple-Valued Logic
Drechsler, Rolf; Krieger, Rolf; Becker, Bernd
1995 // Conference paper
Sympathy: Nearly Exact Minimization of Fixed-Polarity Reed-Muller Expressions for Symmetric Functions
Proceedings of the 1995 European Conference on Design and Test, EDTC 1995
Drechsler, R.; Becker, B.
1995 // Conference paper
Synthesis for Testability: Circuits Derived from Ordered Kronecker Functional Decision Diagrams
Proceedings of the 1995 European Conference on Design and Test, EDTC 1995
Becker, B.; Drechsler, R.
1994 // Conference paper
BiTeS: A BDD-based test pattern generator for strong, robust path delay faults
European Design Automation Conference - Proceedings
Drechsler, Rolf
1994 // Conference paper
Efficient graph-based representation of multivalued functions with an application to genetic algorithms
Proceedings of The International Symposium on Multiple-Valued Logic
Becker, Bernd; Drechsler, Rolf
1994 // Conference paper
Efficient Representation and Manipulation of Switching Functions Based on Ordered Kronecker Functional Decision Diagrams
Proceedings - Design Automation Conference
Drechsler, R.; Sarabi, A.; Theobald, M.; Becker, B.; Perkowski, M.A.
1994 // Conference paper
Fast OFDD-Based Minimization of Fixed-Polarity Reed-Muller Expressions
European Design Automation Conference - Proceedings
Drechsler, Rolf; Theobald, Michael; Becker, Bernd
1994 // Conference paper
OFDD-Based Minimization of Fixed-Polarity Reed-Muller Expressions Using Hybrid Genetic Algorithms
Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors
Becker, Bernd; Drechsler, Rolf
1994 // Conference paper
Testability of Circuits Derived from Functional Decision Diagrams
Proceedings of the European Design and Test Conference
Becker, Bernd; Drechsler, Rolf
1994 // Conference paper
Testability Properties of Local Circuit Transformations with Respect to the Robust Path-Delay-Fault Model
Proceedings of the IEEE International Conference on VLSI Design
Hengster, Harry; Drechsler, Rolf; Becker, Bernd
1993 // Conference paper
Implementation of an Efficient, Performance-Driven Generator for Conditional Sum-Adders
European Design Automation Conference - Proceedings
Becker, Bernd; Drechsler, Rolf
1992 // Conference paper
Time-optimal, robust, path-delay-fault-self-testable adder
European Design Automation Conference
Becker, Bernd; Drechsler, Rolf
