1995 // Book
OKFDDs versus OBDDs and OFDDs
Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
Becker, B.; Drechsler, R.; Theobald, M.
1995 // Journal article
On local transformations and path delay fault testability
Journal of Electronic Testing
Hengster, H.; Drechsler, R.; Becker, B.
1995 // Conference paper
On the application of local circuit transformations with special emphasis on path delay fault testability
Proceedings of the IEEE VLSI Test Symposium
Hengster, Harry; Drechsler, Rolf; Becker, Bernd
1995 // Journal article
On the Generation of Area-Time Optimal Testable Adders
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Becker, B.; Drechsler, R.; Molitor, P.
1995 // Journal article
On the relation between BDDs and FDDs
Information and Computation
Becker, B.; Drechsler, R.; Werchner, R.
1995 // Book
On the relation between BDDs and FDDs: Extended abstract
Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
Becker, B.; Drechsler, R.; Werchner, R.
1995 // Conference paper
On variable ordering and decomposition type choice in OKFDDs
Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC
Drechsler, Rolf; Becker, Bernd; Jahnke, Andrea
1995 // Conference paper
Random pattern fault simulation in multi-valued circuits
Proceedings of The International Symposium on Multiple-Valued Logic
Drechsler, Rolf; Krieger, Rolf; Becker, Bernd
1995 // Conference paper
Sympathy: Fast exact minimization of fixed polarity reed-muller expressions for symmetric functions
Proceedings of the 1995 European Conference on Design and Test, EDTC 1995
Drechsler, R.; Becker, B.
1995 // Conference paper
Synthesis for testability: Circuits derived from ordered kronecker functional decision diagrams
Proceedings of the 1995 European Conference on Design and Test, EDTC 1995
Becker, B.; Drechsler, R.
1994 // Conference paper
BiTeS: A BDD based test pattern generator for strong robust path delay faults
European Design Automation Conference - Proceedings
Drechsler, Rolf
1994 // Conference paper
Efficient graph based representation of multi-valued functions with an application to genetic algorithms
Proceedings of The International Symposium on Multiple-Valued Logic
Becker, Bernd; Drechsler, Rolf
1994 // Conference paper
Efficient representation and manipulation of switching functions based on ordered Kronecker functional decision diagrams
Proceedings - Design Automation Conference
Drechsler, R.; Sarabi, A.; Theobald, M.; Becker, B.; Perkowski, M.A.
1994 // Conference paper
Fast OFDD based minimization of fixed polarity Reed-Muller expressions
European Design Automation Conference - Proceedings
Drechsler, Rolf; Theobald, Michael; Becker, Bernd
1994 // Conference paper
OFDD based minimization of fixed polarity Reed-Muller expressions using hybrid genetic algorithms
Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors
Becker, Bernd; Drechsler, Rolf
1994 // Conference paper
Testability of circuits derived from functional decision diagrams
Proceedings of the European Design and Test Conference
Becker, Bernd; Drechsler, Rolf
1994 // Conference paper
Testability properties of local circuit transformations with respect to the robust path-delay-fault model
Proceedings of the IEEE International Conference on VLSI Design
Hengster, Harry; Drechsler, Rolf; Becker, Bernd
1993 // Conference paper
Implementation of an efficient performance driven generator for conditional sum-adders
European Design Automation Conference - Proceedings
Becker, Bernd; Drechsler, Rolf
1992 // Conference paper
Time optimal robust path-delay-fault self-testable adder
European Design Automation Conference
Becker, Bernd; Drechsler, Rolf
