Prof. Rolf Drechsler

Further information:

AG Computer Architecture & Reliable Embedded Systems; DFKI Cyber Physical Systems

Ecosystem

Member of the Board of Directors of the research focus "Minds, Media, Machines"

Head of the Computer Architecture working group

Director of the Cyber Physical Systems Group at the German Research Center for Artificial Intelligence (DFKI)

Co-founder and speaker of the Data Science Center (DSC) at the University of Bremen

Dean of Faculty 3 Mathematics/Computer Science

Supervisor for the research training group "CAUSE"

Member of the CoAI JRC Joint Research Center on Cooperative and Cognition enabled AI

Member of the Board of Directors of the "Logdynamics" research cluster

Publications

2000 // Journal article

EXOR transformation of inputs to design efficient two-level AND/EXOR adders

Electronics Letters

Drechsler, R.; Becker, B.

https://doi.org/10.1049/el:20000214

2000 // Journal article

Almost-exact minimization of BDDs

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Drechsler, R.; Drechsler, N.; Günther, W.

https://doi.org/10.1109/43.833206

2000 // Conference paper

Genetic Algorithm for Minimizing Fixed-Polarity Reed-Muller Expressions

IEE Proceedings: Computers and Digital Techniques

Drechsler, R.; Becker, B.; Drechsler, N.

https://doi.org/10.1049/ip-cdt:20000743

2000 // Journal article

Lower-bound sifting for MDDs

Proceedings of The International Symposium on Multiple-Valued Logic

Janković, D.; Günther, W.; Drechsler, R.

https://doi.org/10.1109/ISMVL.2000.848619

2000 // Journal article

MDD-Based Synthesis of Multi-Valued Logic Networks

Proceedings of The International Symposium on Multiple-Valued Logic

Drechsler, R.; Thornton, M.; Wessels, D.

https://doi.org/10.1109/ISMVL.2000.848598

2000 // Conference paper

Method for Approximate Equivalence Checking

Proceedings of The International Symposium on Multiple-Valued Logic

Thornton, Mitch; Drechsler, Rolf; Gunther, Wolfgang

http://www.scopus.com/inward/record.url?eid=2-s2.0-0033684455&partnerID=MN8TOARS

2000 // Conference paper

Minimization of Ordered Pseudo-Kronecker Decision Diagrams

Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors

Lindgren, Per; Drechsler, Rolf; Becker, Bernd

http://www.scopus.com/inward/record.url?eid=2-s2.0-0033679714&partnerID=MN8TOARS

2000 // Journal article

On the Computational Power of Linearly Transformed BDDs

Information Processing Letters

Günther, W.; Drechsler, R.

https://doi.org/10.1016/S0020-0190(00)00083-1

2000 // Journal article

Optimal Symmetry Detection for OKFDDs

Midwest Symposium on Circuits and Systems

Wang, Y.; Drechsler, R.; Song, X.

https://doi.org/10.1109/MWSCAS.2000.951480

2000 // Conference paper

Optimization of Sequential Verification Through History-Based Dynamic Minimization of BDDS

Proceedings - IEEE International Symposium on Circuits and Systems

Drechsler, Rolf; Guenther, Wolfgang

http://www.scopus.com/inward/record.url?eid=2-s2.0-0033684534&partnerID=MN8TOARS

2000 // Conference paper

Testability of Circuits Derived from Lattice Diagrams

Conference Proceedings of EUROMICRO

Drechsler, R.; Günther, W.; Becker, B.

https://doi.org/10.1109/EURMIC.2000.874632

2000 // Conference paper

Verification of Designs Containing Black Boxes

Conference Proceedings of EUROMICRO

Günther, W.; Drechsler, N.; Drechsler, R.; Becker, B.

https://doi.org/10.1109/EURMIC.2000.874621

1999 // Journal article

BDD minimization using symmetries

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Scholl, C.; Möller, D.; Molitor, P.; Drechsler, R.

https://doi.org/10.1109/43.743706

1999 // Conference paper

Checking Integrity During Dynamic Reordering in Decision Diagrams

Conference Proceedings of EUROMICRO

Drechsler, R.

https://doi.org/10.1109/EURMIC.1999.794492

1999 // Conference paper

Creating Hard Problem Instances in Logic Synthesis Using Exact Minimization

Proceedings - IEEE International Symposium on Circuits and Systems

Guenter, Wolfgang; Drechsler, Rolf

http://www.scopus.com/inward/record.url?eid=2-s2.0-17444453891&partnerID=MN8TOARS

1999 // Conference paper

Design of Experiments in CAD: Context and New Data Sets for ISCAS'99

Proceedings - IEEE International Symposium on Circuits and Systems

Brglez, Franc; Drechsler, Rolf

http://www.scopus.com/inward/record.url?eid=2-s2.0-0032624124&partnerID=MN8TOARS

1999 // Book

Efficient graph coloring using evolutionary algorithms

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Drechsler, N.; Günther, W.; Drechsler, R.

http://www.scopus.com/inward/record.url?eid=2-s2.0-84956669671&partnerID=MN8TOARS

1999 // Conference paper

Efficient Manipulation Algorithms for Linearly Transformed BDDs

IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers

Guenther, Wolfgang; Drechsler, Rolf

http://www.scopus.com/inward/record.url?eid=2-s2.0-0033337595&partnerID=MN8TOARS

1999 // Conference paper

Exact channel routing using symbolic representation

Proceedings - IEEE International Symposium on Circuits and Systems

Schmiedle, Frank; Drechsler, Rolf; Becker, Bernd

http://www.scopus.com/inward/record.url?eid=2-s2.0-0032679025&partnerID=MN8TOARS

1999 // Conference paper

Exploiting "don't cares" During Data Sequencing Using Genetic Algorithms

Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

Drechsler, N.; Drechsler, R.

https://doi.org/10.1109/ASPDAC.1999.760019

1999 // Conference paper

Formal Verification of Word-Level Specifications

Proceedings -Design, Automation and Test in Europe, DATE

Horeth, S.; Drechsler, R.

https://doi.org/10.1109/DATE.1999.761096

1999 // Conference paper

Generation of Optimal Universal Logic Modules

Conference Proceedings of EUROMICRO

Drechsler, R.; Gunther, W.

https://doi.org/10.1109/EURMIC.1999.794451

1999 // Conference paper

Generic Implementation of DD Packages in MVL

Conference Proceedings of EUROMICRO

Drechsler, R.; Jankovic, D.; Stankovic, R.S.

https://doi.org/10.1109/EURMIC.1999.794491

1999 // Conference paper

Grouping heuristics for word-level decision diagrams

Proceedings - IEEE International Symposium on Circuits and Systems

Drechsler, Rolf; Herbstritt, Marc; Becker, Bernd

http://www.scopus.com/inward/record.url?eid=2-s2.0-0032715427&partnerID=MN8TOARS

1999 // Conference paper

Minimization of BDDS Using Linear Transformations Based on Evolutionary Techniques

Proceedings - IEEE International Symposium on Circuits and Systems

Guenther, Wolfgang; Drechsler, Rolf

http://www.scopus.com/inward/record.url?eid=2-s2.0-17644438588&partnerID=MN8TOARS

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Prof. Rolf Drechsler

Ecosystem

Publications

EXOR transformation of inputs to design efficient two-level AND/EXOR adders

Almost-exact minimization of BDDs

Genetic Algorithm for Minimizing Fixed-Polarity Reed-Muller Expressions

Lower-bound sifting for MDDs

MDD-Based Synthesis of Multi-Valued Logic Networks

Method for Approximate Equivalence Checking

Minimization of Ordered Pseudo-Kronecker Decision Diagrams

On the Computational Power of Linearly Transformed BDDs

Optimal Symmetry Detection for OKFDDs

Optimization of Sequential Verification Through History-Based Dynamic Minimization of BDDS

Testability of Circuits Derived from Lattice Diagrams

Verification of Designs Containing Black Boxes

BDD minimization using symmetries

Checking Integrity During Dynamic Reordering in Decision Diagrams

Creating Hard Problem Instances in Logic Synthesis Using Exact Minimization

Design of Experiments in CAD: Context and New Data Sets for ISCAS'99

Efficient graph coloring using evolutionary algorithms

Efficient Manipulation Algorithms for Linearly Transformed BDDs

Exact channel routing using symbolic representation

Exploiting "don't cares" During Data Sequencing Using Genetic Algorithms

Formal Verification of Word-Level Specifications

Generation of Optimal Universal Logic Modules

Generic Implementation of DD Packages in MVL

Grouping heuristics for word-level decision diagrams

Minimization of BDDS Using Linear Transformations Based on Evolutionary Techniques

Please feel free to mail us, if you have any further questions

Please feel free to mail us, if you have any further questions