Prof. Rolf Drechsler

Further information:

AG Computer Architecture & Reliable Embedded Systems; DFKI Cyber Physical Systems

Ecosystem

Member of the Board of Directors of the research focus "Minds, Media, Machines"

Head of the Computer Architecture working group

Director of the Cyber Physical Systems Group at the German Research Center for Artificial Intelligence (DFKI)

Co-founder and speaker of the Data Science Center (DSC) at the University of Bremen

Dean of Faculty 3 Mathematics/Computer Science

Supervisor for the research training group "CAUSE"

Member of the CoAI JRC Joint Research Center on Cooperative and Cognition enabled AI

Member of the Board of Directors of the "Logdynamics" research cluster

Publications

2017 // Conference paper

Data Flow Testing for Virtual Prototypes

Proceedings of the 2017 Design, Automation, and Test in Europe (DATE 2017)

Hassan, M.; Herdt, V.; Le, H.M.; Chen, M.; Große, D.; Drechsler, R.

https://doi.org/10.23919/DATE.2017.7927020

2017 // Conference paper

Dedicated synthesis for MZI-based optical circuits based on AND-inverter graphs

IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD

Deb, A.; Wille, R.; Drechsler, R.

https://doi.org/10.1109/ICCAD.2017.8203783

2017 // Conference paper

Early SoC Security Validation Using VP-Based Static Information Flow Analysis

IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD

Hassan, M.; Herdt, V.; Le, H.M.; Grose, D.; Drechsler, R.

https://doi.org/10.1109/ICCAD.2017.8203805

2017 // Conference paper

Effects of Cell Shapes on the Routability of Digital Microfluidic Biochips

Proceedings of the 2017 Design, Automation, and Test in Europe (DATE 2017)

Schneider, L.; Keszocze, O.; Stoppe, J.; Drechsler, R.

https://doi.org/10.23919/DATE.2017.7927252

2017 // Book

Efficient Construction of QMDDs for Irreversible, Reversible, and Quantum Functions

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Niemann, P.; Zulehner, A.; Wille, R.; Drechsler, R.

https://doi.org/10.1007/978-3-319-59936-6_17

2017 // Book

Emerging Circuit Technologies: An Overview of the Next Generation of Circuits

Advanced Logic Synthesis

Wille, R.; Chakrabarty, K.; Drechsler, R.; Kalla, P.

https://doi.org/10.1007/978-3-319-67295-3_3

2017 // Conference paper

Endurance Management for Resistive Logic-in-Memory Computing Architectures

Proceedings of the 2017 Design, Automation, and Test in Europe (DATE 2017)

Shirinzadeh, S.; Soeken, M.; Gaillardon, P.-E.; De Micheli, G.; Drechsler, R.

https://doi.org/10.23919/DATE.2017.7927152

2017 // Conference paper

Enhancing the Robustness of Sequential Circuits Using Application-Specific Knowledge and Formal Methods

Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

Huhn, S.; Frehse, S.; Wille, R.; Drechsler, R.

https://doi.org/10.1109/ASPDAC.2017.7858317

2017 // Conference paper

Equivalence checking using Gröbner bases

Proceedings of the 16th Conference on Formal Methods in Computer-Aided Design, FMCAD 2016

Sayed-Ahmed, A.; Grobe, D.; Soeken, M.; Drechsler, R.

https://doi.org/10.1109/FMCAD.2016.7886676

2017 // Conference paper

Error-Bounded Exact BDD Minimization in Approximate Computing

Proceedings of The International Symposium on Multiple-Valued Logic

Froehlich, S.; Große, D.; Drechsler, R.

https://doi.org/10.1109/ISMVL.2017.11

2017 // Conference paper

ETS 2017 Foreword

Proceedings of the European Test Workshop

Michael, M.K.; Drechsler, R.; Eggersgluss, S.; Stratigopoulos, H.-G.; Hellebrand, S.; Aitken, R.

https://doi.org/10.1109/ETS.2017.7968204

2017 // Conference paper

Precise routing for digital microfluidic biochips with microelectrode dot arrays

Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

Keszocze, O.; Li, Z.; Grimmer, A.; Wille, R.; Chakrabarty, K.; Drechsler, R.

https://doi.org/10.1109/ASPDAC.2017.7858407

2017 // Conference paper

Exact Synthesis of Ternary Reversible Functions Using Ternary Toffoli Gates

Proceedings of The International Symposium on Multiple-Valued Logic

Kole, A.; Rani, P.M.N.; Datta, K.; Sengupta, I.; Drechsler, R.

https://doi.org/10.1109/ISMVL.2017.51

2017 // Conference paper

Exploring Superior Structural Materials Using Multi-Objective Optimization and Formal Techniques

Proceedings - 2016 6th International Symposium on Embedded Computing and System Design, ISED 2016

Drechsler, R.; Eggersglub, S.; Ellendt, N.; Huhn, S.; Madler, L.

https://doi.org/10.1109/ISED.2016.7977046

2017 // Conference paper

Extensions to the Reversible Hardware Description Language (SyReC)

Proceedings of The International Symposium on Multiple-Valued Logic

Alwardi, Z.; Wille, R.; Drechsler, R.

https://doi.org/10.1109/ISMVL.2017.41

2017 // Conference paper

From Reversible Logic to Quantum Circuits: Logic Design for an Emerging Technology

Proceedings - 2016 16th International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation, SAMOS 2016

Wille, R.; Chattopadhyay, A.; Drechsler, R.

https://doi.org/10.1109/SAMOS.2016.7818357

2017 // Conference paper

Generating and Verifying Control Logic in the HDL-Based Design of Reversible Circuits

Proceedings - 2016 6th International Symposium on Embedded Computing and System Design, ISED 2016

Wille, R.; Keszocze, O.; Othmer, L.; Thomsen, M.K.; Drechsler, R.

https://doi.org/10.1109/ISED.2016.7977045

2017 // Book

Logic Synthesis for Majority-Based In-Memory Computing

Studies in Computational Intelligence

Shirinzadeh, S.; Soeken, M.; Gaillardon, P.-E.; Drechsler, R.

https://doi.org/10.1007/978-3-319-51724-7_17

2017 // Conference paper

Machine learning-based test pattern analysis for identifying critical power activity areas

2017 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2017

Dhotre, H.; Eggersglus, S.; Dehbashi, M.; Pfannkuchen, U.; Drechsler, R.

https://doi.org/10.1109/DFT.2017.8244464

2017 // Journal article

metaSMT: Focus on your application, not on solver integration

International Journal on Software Tools for Technology Transfer

Riener, H.; Haedicke, F.; Frehse, S.; Soeken, M.; Große, D.; Drechsler, R.; Fey, G.

https://doi.org/10.1007/s10009-016-0426-1

2017 // Book

Model-Based Specification and Refinement for Cyber-Physical Systems

Lecture Notes in Logistics

Drechsler, R.; Autexier, S.; Lüth, C.

https://doi.org/10.1007/978-3-319-45117-6_1

2017 // Conference paper

More than just true or false

MEMOCODE 2017 - 15th ACM-IEEE International Conference on Formal Methods and Models for System Design

Przigoda, N.; Niemann, P.; Peters, J.; Hilken, F.; Wille, R.; Drechsler, R.

https://doi.org/10.1145/3127041.3127053

2017 // Other

On the Difficulty of Inserting Trojans into Reversible Computing Architectures

arXiv

Cui, X.; Saeed, S.; Zulehner, A.; Wille, R.; Drechsler, R.; Wu, K.; Karri, R.

http://www.scopus.com/inward/record.url?eid=2-s2.0-85094403902&partnerID=MN8TOARS

2017 // Conference paper

Optimization of Retargeting for IEEE 1149.1 TAP Controllers with Embedded Compression

Proceedings of the 2017 Design, Automation, and Test in Europe (DATE 2017)

Huhn, S.; Eggersglus, S.; Chakrabarty, K.; Drechsler, R.

https://doi.org/10.23919/DATE.2017.7927053

2017 // Conference paper

OR-Inverter Graphs for the Synthesis of Optical Circuits

Proceedings of The International Symposium on Multiple-Valued Logic

Deb, A.; Wille, R.; Drechsler, R.

https://doi.org/10.1109/ISMVL.2017.31

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Prof. Rolf Drechsler

Ecosystem

Publications

Data Flow Testing for Virtual Prototypes

Dedicated synthesis for MZI-based optical circuits based on AND-inverter graphs

Early SoC Security Validation Using VP-Based Static Information Flow Analysis

Effects of Cell Shapes on the Routability of Digital Microfluidic Biochips

Efficient Construction of QMDDs for Irreversible, Reversible, and Quantum Functions

Emerging Circuit Technologies: An Overview of the Next Generation of Circuits

Endurance Management for Resistive Logic-in-Memory Computing Architectures

Enhancing the Robustness of Sequential Circuits Using Application-Specific Knowledge and Formal Methods

Equivalence checking using Gröbner bases

Error-Bounded Exact BDD Minimization in Approximate Computing

ETS 2017 Foreword

Precise routing for digital microfluidic biochips with microelectrode dot arrays

Exact Synthesis of Ternary Reversible Functions Using Ternary Toffoli Gates

Exploring Superior Structural Materials Using Multi-Objective Optimization and Formal Techniques

Extensions to the Reversible Hardware Description Language (SyReC)

From Reversible Logic to Quantum Circuits: Logic Design for an Emerging Technology

Generating and Verifying Control Logic in the HDL-Based Design of Reversible Circuits

Logic Synthesis for Majority-Based In-Memory Computing

Machine learning-based test pattern analysis for identifying critical power activity areas

metaSMT: Focus on your application, not on solver integration

Model-Based Specification and Refinement for Cyber-Physical Systems

More than just true or false

On the Difficulty of Inserting Trojans into Reversible Computing Architectures

Optimization of Retargeting for IEEE 1149.1 TAP Controllers with Embedded Compression

OR-Inverter Graphs for the Synthesis of Optical Circuits

Please feel free to mail us, if you have any further questions

Please feel free to mail us, if you have any further questions