Prof. Rolf Drechsler

Further information:

AG Computer Architecture & Reliable Embedded Systems; DFKI Cyber Physical Systems

Ecosystem

Member of the Board of Directors of the research focus "Minds, Media, Machines"

Head of the Computer Architecture working group

Director of the Cyber Physical Systems Group at the German Research Center for Artificial Intelligence (DFKI)

Co-founder and speaker of the Data Science Center (DSC) at the University of Bremen

Dean of Faculty 3 Mathematics/Computer Science

Supervisor for the research training group "CAUSE"

Member of the CoAI JRC Joint Research Center on Cooperative and Cognition enabled AI

Member of the Board of Directors of the "Logdynamics" research cluster

Publications

2017 // Book

Preface

Formal System Verification: State-of-the-Art and Future Trends

Drechsler, R.

https://doi.org/10.1007/978-3-319-57685-5

2017 // Conference paper

ProACt: A processor for high-performance on-demand approximate computing

Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI

Chandrasekharan, A.; Große, D.; Drechsler, R.

https://doi.org/10.1145/3060403.3060415

2017 // Conference paper

Reconfigurable TAP controllers with embedded compression for large test data volumes

2017 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2017

Huhn, S.; Eggersglus, S.; Drechsler, R.

https://doi.org/10.1109/DFT.2017.8244462

2017 // Book

Semi-formal reconstruction of cycle-accurate temporal execution traces

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Massoud, R.; Stoppe, J.; Große, D.; Drechsler, R.

https://doi.org/10.1007/978-3-319-65765-3_19

2017 // Journal article

Synthesis of optical circuits using binary decision diagrams

Integration, the VLSI Journal

Deb, A.; Wille, R.; Keszöcze, O.; Shirinzadeh, S.; Drechsler, R.

https://doi.org/10.1016/j.vlsi.2017.05.001

2017 // Conference paper

Toward a Model-Based Verification Methodology for Complex Swarm Systems (Invited Paper)

Proceedings - 2016 6th International Symposium on Embedded Computing and System Design, ISED 2016

Filho, J.G.; Przigoda, N.; Wille, R.; Drechsler, R.

https://doi.org/10.1109/ISED.2016.7977047

2017 // Journal article

Toward a Verification Flow Across Abstraction Levels: Verifying Implementations Against Their Formal Specifications

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Gonzalez-De-Aledo, P.; Przigoda, N.; Wille, R.; Drechsler, R.; Sanchez, P.

https://doi.org/10.1109/TCAD.2016.2611494

2017 // Other

Toward Reverse Engineering Reversible Logic

arXiv

Saeed, S.M.; Cui, X.; Wille, R.; Zulehner, A.; Wu, K.; Drechsler, R.; Karri, R.

http://www.scopus.com/inward/record.url?eid=2-s2.0-85094429637&partnerID=MN8TOARS

2017 // Book

Toward VHDL-Based Design of Reversible Circuits: Work in Progress Report

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Al-Wardi, Z.; Wille, R.; Drechsler, R.

https://doi.org/10.1007/978-3-319-59936-6_8

2017 // Conference paper

Trust Is Good, Control Is Better: Hardware-Based Instruction Replacement for Reliable Processor IPs

Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

Schmitz, K.; Chandrasekharan, A.; Filho, J.G.; Große, D.; Drechsler, R.

https://doi.org/10.1109/ASPDAC.2017.7858296

2017 // Conference paper

Non-intrusive aging analysis based on offline learning

2017 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2017

Torres, F.S.; Rodrigues Leite, P.F.; Drechsler, R.

https://doi.org/10.1109/DFT.2017.8244453

2017 // Conference paper

Yise - A Novel Framework for Boolean Networks Using Y-Inverter Graphs

MEMOCODE 2017 - 15th ACM-IEEE International Conference on Formal Methods and Models for System Design

Chandrasekharan, A.; Große, D.; Drechsler, R.

https://doi.org/10.1145/3127041.3127065

2016 // Conference paper

A General and Exact Routing Methodology for Digital Microfluidic Biochips

2015 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2015

Keszocze, O.; Wille, R.; Chakrabarty, K.; Drechsler, R.

https://doi.org/10.1109/ICCAD.2015.7372663

2016 // Conference paper

AIBA: An Automated Intra-cycle Behavioral Analysis for SystemC-based Design Exploration

Proceedings of the 34th IEEE International Conference on Computer Design, ICCD 2016

Goli, M.; Stoppe, J.; Drechsler, R.

https://doi.org/10.1109/ICCD.2016.7753303

2016 // Conference paper

A MIG-based compiler for programmable logic-in-memory architectures

Proceedings - Design Automation Conference

Soeken, M.; Shirinzadeh, S.; Gaillardon, P.-E.; Amarú, L.G.; Drechsler, R.; De Micheli, G.

https://doi.org/10.1145/2897937.2897985

2016 // Journal article

Analyzing Inconsistencies in UML/OCL Models

Journal of Circuits, Systems, and Computers

Przigoda, N.; Wille, R.; Drechsler, R.

https://doi.org/10.1142/S0218126616400211

2016 // Journal article

Ancilla-free synthesis of large reversible functions using binary decision diagrams

Journal of Symbolic Computation

Soeken, M.; Tague, L.; Dueck, G.W.; Drechsler, R.

https://doi.org/10.1016/j.jsc.2015.03.002

2016 // Conference paper

Approximate BDD Optimization Using a Prioritized -Preferred Evolutionary Algorithm

GECCO 2016 Companion - Proceedings of the 2016 Genetic and Evolutionary Computation Conference

Shirinzadeh, S.; Soeken, M.; Groe, D.; Drechsler, R.

https://doi.org/10.1145/2908961.2908987

2016 // Conference paper

Approximation-Aware Rewriting of AIGs for Error-Tolerant Applications

IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD

Chandrasekharan, A.; Soeken, M.; Große, D.; Drechsler, R.

https://doi.org/10.1145/2966986.2967003

2016 // Journal article

Atomic Distributions in Crystal Structures Solved Using Boolean Satisfiability Techniques

Journal of Crystallography - Crystalline Materials

Soeken, M.; Drechsler, R.; Fischer, R.X.

https://doi.org/10.1515/zkri-2015-1887

2016 // Book

Automatic refinement checking for formal system models

Lecture Notes in Electrical Engineering

Seiter, J.; Wille, R.; Kühne, U.; Drechsler, R.

https://doi.org/10.1007/978-3-319-24457-0_1

2016 // Conference paper

BDD minimization for approximate computing

Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

Soeken, M.; Grobe, D.; Chandrasekharan, A.; Drechsler, R.

https://doi.org/10.1109/ASPDAC.2016.7428057

2016 // Conference paper

Change Impact Analysis for Hardware Designs: From Natural Language to the System Level

Forum on Specification and Design Languages

Ring, M.; Stoppe, J.; Luth, C.; Drechsler, R.

https://doi.org/10.1109/FDL.2016.7880369

2016 // Conference paper

Clocks vs. Instant Relations: Verifying CCSL Time Constraints in UML/MARTE Models

2016 ACM/IEEE International Conference on Formal Methods and Models for System Design, MEMOCODE 2016

Peters, J.; Przigoda, N.; Wille, R.; Drechsler, R.

https://doi.org/10.1109/MEMCOD.2016.7797750

2016 // Conference paper

Compiled symbolic simulation for SystemC

IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD

Herdt, V.; Le, H.M.; Große, D.; Drechsler, R.

https://doi.org/10.1145/2966986.2967016

"‹16 / 39›»

Prof. Rolf Drechsler

Ecosystem

Publications

Preface

ProACt: A processor for high-performance on-demand approximate computing

Reconfigurable TAP controllers with embedded compression for large test data volumes

Semi-formal reconstruction of cycle-accurate temporal execution traces

Synthesis of optical circuits using binary decision diagrams

Toward a Model-Based Verification Methodology for Complex Swarm Systems (Invited Paper)

Toward a Verification Flow Across Abstraction Levels: Verifying Implementations Against Their Formal Specifications

Toward Reverse Engineering Reversible Logic

Toward VHDL-Based Design of Reversible Circuits: Work in Progress Report

Trust Is Good, Control Is Better: Hardware-Based Instruction Replacement for Reliable Processor IPs

Non-intrusive aging analysis based on offline learning

Yise - A Novel Framework for Boolean Networks Using Y-Inverter Graphs

A General and Exact Routing Methodology for Digital Microfluidic Biochips

AIBA: An Automated Intra-cycle Behavioral Analysis for SystemC-based Design Exploration

A MIG-based compiler for programmable logic-in-memory architectures

Analyzing Inconsistencies in UML/OCL Models

Ancilla-free synthesis of large reversible functions using binary decision diagrams

Approximate BDD Optimization Using a Prioritized -Preferred Evolutionary Algorithm

Approximation-Aware Rewriting of AIGs for Error-Tolerant Applications

Atomic Distributions in Crystal Structures Solved Using Boolean Satisfiability Techniques

Automatic refinement checking for formal system models

BDD minimization for approximate computing

Change Impact Analysis for Hardware Designs: From Natural Language to the System Level

Clocks vs. Instant Relations: Verifying CCSL Time Constraints in UML/MARTE Models

Compiled symbolic simulation for SystemC

Please feel free to mail us, if you have any further questions

Please feel free to mail us, if you have any further questions