2007 // Conference paper
A Framework for Quasi-Exact Optimization Using Relaxed Best-First Search
Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
Ebendt, R.; Drechsler, R.
2007 // Book
Automatic Fault Localization for Property Checking
Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
Staber, S.; Fey, G.; Bloem, R.; Drechsler, R.
2007 // Conference paper
Co-synthesis of Custom On-Chip Buses and Memory for MPSoC Architectures
2007 IFIP International Conference on Very Large Scale Integration, VLSI-SoC
Pandey, S.; Genz, C.; Drechsler, R.
2007 // Conference paper
Combining multi-valued logics in SAT-based ATPG for path delay faults
Proceedings - Fifth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, MEMOCODE'07
Eggersglüß, S.; Fey, G.; Drechsler, R.; Glowatz, A.; Hapke, F.; Schloeffel, J.
2007 // Conference paper
Estimating Functional Coverage in Bounded Model Checking
Proceedings -Design, Automation and Test in Europe, DATE
Große, D.; Kühne, U.; Drechsler, R.
2007 // Conference paper
Evaluation of Toggle Coverage for MVL Circuits Specified in SystemVerilog HDL
Proceedings of The International Symposium on Multiple-Valued Logic
Amoui, M.; Große, D.; Thornton, M.A.; Drechsler, R.
2007 // Book
Exact BDD minimization for path-related objective functions
IFIP International Federation for Information Processing
Ebendt, R.; Drechsler, R.
2007 // Conference paper
Exact SAT-Based Toffoli Network Synthesis
Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI
Groe, D.; Chen, X.; Dueck, G.W.; Drechsler, R.
2007 // Conference paper
Experimental Studies on SAT-Based ATPG for Gate Delay Faults
Proceedings of The International Symposium on Multiple-Valued Logic
Eggersglüß, S.; Tille, D.; Fey, G.; Drechsler, R.; Glowatz, A.; Hapke, F.; Schlöffel, J.
2007 // Conference paper
Hardware project management what we can learn from the software development process for hardware design
ICSOFT 2007 - 2nd International Conference on Software and Data Technologies, Proceedings
Drechsler, R.; Breiter, A.
2007 // Conference paper
Improvements to Constraint Solving in the SystemC Verification Library
Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI
Groe, D.; Ebendt, R.; Drechsler, R.
2007 // Conference paper
Improving Test Pattern Compactness in SAT-Based ATPG
Proceedings of the Asian Test Symposium
Eggersglüß, S.; Drechsler, R.
2007 // Conference paper
Improving the Quality of Bounded Model Checking Through Coverage Estimation
Proceedings - IEEE Computer Society Annual Symposium on VLSI: Emerging VLSI Technologies and Architectures
Kühne, U.; Große, D.; Drechsler, R.
2007 // Conference paper
Instance Generation for SAT-Based ATPG
Proceedings of the 2007 IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems, DDECS
Tille, D.; Fey, G.; Drechsler, R.
2007 // Conference paper
Lecture Notes in Computer Science (including the subseries Lecture Notes in Artificial Intelligence and Lecture Notes: Preface
Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
Giacobini, M.; Di Caro, G.A.; Fink, A.; Minner, S.; Rothlauf, F.; Şima Uyar, A.; Brabazon, A.; Drechsler, R.; Lutton, E.; O'Neill, M.; Squillero, G.; Shengxiang, Y.; Cagnoni, S.; Farooq, M.; Machado, P.; Romero, J.; Takagi, H.
2007 // Conference paper
Modeling a fully scalable reed-solomon encoder/decoder over GF(p <sup>m</sup>) in SystemC
Proceedings of The International Symposium on Multiple-Valued Logic
Sülflow, A.; Drechsler, R.
2007 // Conference paper
On the Design of Small, Fully Testable Circuits with Low Depth
Proceedings - 10th Euromicro Conference on Digital System Design Architectures, Methods, and Tools, DSD 2007
Fey, G.; Bernasconi, A.; Ciriani, V.; Drechsler, R.
2007 // Book
Processor Verification
Customizable Embedded Processors
Große, D.; Drechsler, R.; Siegmund, R.
2007 // Conference paper
Proving the Completeness of Properties in the Formal Verification of Counting Heads for Railways
Proceedings - 10th Euromicro Conference on Digital System Design Architectures, Methods, and Tools, DSD 2007
Kinder, S.; Drechsler, R.
2007 // Conference paper
Reusing Learned Information in SAT-Based ATPG
Proceedings of the IEEE International Conference on VLSI Design
Fey, G.; Warode, T.; Drechsler, R.
2007 // Book
Robust multi-objective optimization in high-dimensional spaces
Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
Sülflow, A.; Drechsler, N.; Drechsler, R.
2007 // Conference paper
SAT-Based ATPG for Path Delay Faults in Sequential Circuits
Proceedings - IEEE International Symposium on Circuits and Systems
Eggersglüß, S.; Fey, G.; Drechsler, R.
2007 // Conference paper
SWORD: A SAT-like prover that uses word-level information
2007 IFIP International Conference on Very Large Scale Integration, VLSI-SoC
Wille, R.; Fey, G.; Große, D.; Eggersglüß, S.; Drechsler, R.
2007 // Journal article
Technical Documentation of Software and Hardware in Embedded Systems, Technical Documentation of Software and Hardware in Embedded Systems
IT - Information Technology
Muranko, B.; Drechsler, R.
2007 // Conference paper
Visualization of SystemC Designs
Proceedings - IEEE International Symposium on Circuits and Systems
Genz, C.; Drechsler, R.; Angst, G.; Linhard, L.
