2007 // Conference paper
A framework for quasi-exact optimization using relaxed best-first search
Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
Ebendt, R.; Drechsler, R.
2007 // Book
Automatic fault localization for property checking
Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
Staber, S.; Fey, G.; Bloem, R.; Drechsler, R.
2007 // Conference paper
Co-synthesis of custom on-chip bus and memory for MPSoC architectures
2007 IFIP International Conference on Very Large Scale Integration, VLSI-SoC
Pandey, S.; Genz, C.; Drechsler, R.
2007 // Conference paper
Combining multi-valued logics in SAT-based ATPG for path delay faults
Proceedings - Fifth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, MEMOCODE'07
Eggersglüß, S.; Fey, G.; Drechsler, R.; Glowatz, A.; Hapke, F.; Schloeffel, J.
2007 // Conference paper
Estimating functional coverage in bounded model checking
Proceedings -Design, Automation and Test in Europe, DATE
Große, D.; Kühne, U.; Drechsler, R.
2007 // Conference paper
Evaluation of toggle coverage for MVL circuits specified in the SystemVerilog HDL
Proceedings of The International Symposium on Multiple-Valued Logic
Amoui, M.; Große, D.; Thornton, M.A.; Drechsler, R.
2007 // Book
Exact BDD minimization for path-related objective functions
IFIP International Federation for Information Processing
Ebendt, R.; Drechsler, R.
2007 // Conference paper
Exact sat-based toffoli network synthesis
Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI
Groe, D.; Chen, X.; Dueck, G.W.; Drechsler, R.
2007 // Conference paper
Experimental studies on SAT-based ATPG for gate delay faults
Proceedings of The International Symposium on Multiple-Valued Logic
Eggersglüß, S.; Tille, D.; Fey, G.; Drechsler, R.; Glowatz, A.; Hapke, F.; Schlöffel, J.
2007 // Conference paper
Hardware project management what we can learn from the software development process for hardware design
ICSOFT 2007 - 2nd International Conference on Software and Data Technologies, Proceedings
Drechsler, R.; Breiter, A.
2007 // Conference paper
Improvements for constraint solving in the systemc verification library
Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI
Groe, D.; Ebendt, R.; Drechsler, R.
2007 // Conference paper
Improving test pattern compactness in SAT-based ATPG
Proceedings of the Asian Test Symposium
Eggersglüß, S.; Drechsler, R.
2007 // Conference paper
Improving the quality of bounded model checking by means of coverage estimation
Proceedings - IEEE Computer Society Annual Symposium on VLSI: Emerging VLSI Technologies and Architectures
Kühne, U.; Große, D.; Drechsler, R.
2007 // Conference paper
Instance generation for SAT-based ATPG
Proceedings of the 2007 IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems, DDECS
Tille, D.; Fey, G.; Drechsler, R.
2007 // Conference paper
Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes: Preface
Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
Giacobini, M.; Di Caro, G.A.; Fink, A.; Minner, S.; Rothlauf, F.; Şima Uyar, A.; Brabazon, A.; Drechsler, R.; Lutton, E.; O'Neill, M.; Squillero, G.; Shengxiang, Y.; Cagnoni, S.; Farooq, M.; Machado, P.; Romero, J.; Takagi, H.
2007 // Conference paper
Modeling a fully scalable reed-solomon encoder/decoder over GF(p <sup>m</sup>) in SystemC
Proceedings of The International Symposium on Multiple-Valued Logic
Sülflow, A.; Drechsler, R.
2007 // Conference paper
On the construction of small fully testable circuits with low depth
Proceedings - 10th Euromicro Conference on Digital System Design Architectures, Methods and Tools, DSD 2007
Fey, G.; Bernasconi, A.; Ciriani, V.; Drechsler, R.
2007 // Book
Processor verification
Customizable Embedded Processors
Große, D.; Drechsler, R.; Siegmund, R.
2007 // Conference paper
Proving completeness of properties in formal verification of counting heads for railways
Proceedings - 10th Euromicro Conference on Digital System Design Architectures, Methods and Tools, DSD 2007
Kinder, S.; Drechsler, R.
2007 // Conference paper
Reusing learned information in SAT-based ATPG
Proceedings of the IEEE International Conference on VLSI Design
Fey, G.; Warode, T.; Drechsler, R.
2007 // Book
Robust multi-objective optimization in high dimensional spaces
Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
Sülflow, A.; Drechsler, N.; Drechsler, R.
2007 // Conference paper
SAT-based ATPG for path delay faults in sequential circuits
Proceedings - IEEE International Symposium on Circuits and Systems
Eggersglüß, S.; Fey, G.; Drechsler, R.
2007 // Conference paper
SWORD: A SAT like prover using word level information
2007 IFIP International Conference on Very Large Scale Integration, VLSI-SoC
Wille, R.; Fey, G.; Große, D.; Eggersglüß, S.; Drechsler, R.
2007 // Journal article
Technical Documentation of Soft- And Hardware in Embedded Systems,Technische Dokumentation von Soft- und Hardware in Eingebetteten Systemen
IT - Information Technology
Muranko, B.; Drechsler, R.
2007 // Conference paper
Visualization of SystemC designs
Proceedings - IEEE International Symposium on Circuits and Systems
Genz, C.; Drechsler, R.; Angst, G.; Linhard, L.
