ReSG: A Data Structure for Verification of Majority-based In-memory Computing on ReRAM Crossbars

ACM Transactions on Embedded Computing Systems

Determining the Effect of Feedback Quality on User Engagement on Online Idea Crowdsourcing Platforms Using an AI model

Proceedings of the ACM on Human-Computer Interaction

Exploiting the Extended Neighborhood of Hexagonal Qubit Architecture for Mapping Quantum Circuits

ACM Journal on Emerging Technologies in Computing Systems

Early SoCs Information Flow Policies Validation Using SystemC-Based Virtual Prototypes at the ESL

ACM Transactions on Embedded Computing Systems

AutoBench: Automatic Testbench Generation and Evaluation Using LLMs for HDL Design

EvoAl - Codeless Domain-Optimisation

Late Breaking Results: LLM-assisted Automated Incremental Proof Generation for Hardware Verification

Efficient Equivalence Checking of Nonlinear Analog Circuits using Gradient Ascent

Exploring the Potential of Decision Diagrams for Efficient In-Memory Design Verification

cecApprox: Enabling Automated Combinational Equivalence Checking for Approximate Circuits

IEEE Transactions on Circuits and Systems I: Regular Papers

veriSIMPLER: An Automated Formal Verification Methodology for SIMPLER MAGIC Design Style Based In-Memory Computing

IEEE Transactions on Circuits and Systems I: Regular Papers

OPTI-Sim: Performing Optical Probing Simulation on Layout Design Files

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Auto-OPS: A Framework For Automated Optical Probing Simulation on GDS-II

IEEE Embedded Systems Letters

PolyMiR: Polynomial Formal Verification of the MicroRV32 Processor

Polynomial Formal Verification of KFDD Circuits

Polynomial Formal Verification exploiting Constant Cutwidth

Next-Generation Automatic Human-Readable Proofs Enabling Polynomial Formal Verification

Synergistic Verification of Hardware Peripherals through Virtual Prototype Aided Cross-Level Methodology Leveraging Coverage-Guided Fuzzing and Co-Simulation

Chips

Repetitive Processes and Their Surrogate-Model Congruent Encoding for Evolutionary Algorithms - A Theoretic Proposal

Scalable Neuroevolution of Ensemble Learners

MARADIV: Library of MAGIC-Based Approximate Restoring Array Divider Benchmark Circuits for In-Memory Computing Using Memristors

IEEE Transactions on Circuits and Systems II: Express Briefs

Specification-Based Symbolic Execution for Stateful Network Protocol Implementations in IoT

IEEE Internet of Things Journal

A Class of Polynomially Verifiable Circuits of Logarithmic Depth

Proceedings of the 13th International Conference on Cloud Computing, Data Science and Engineering, Confluence 2023

Impact of sneak paths on in-memory logic design in memristive crossbars

IT - Information Technology

Lower Bound Proof for the Size of Bdds Representing a Shifted Addition

SSRN