2022 // conference-paper
Virtual Prototype driven Design, Implementation and Evaluation of RISC-V Instruction Set Extensions
Proceedings - 2022 25th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2022
Funck, M.; Herdt, V.; Drechsler, R.
DOI: 10.1109/DDECS54261.2022.9770108
2022 // conference-paper
Symbolic Fault Injection for Plan-based Robotics
International Conference on Control, Automation and Systems
Meywerk, T.; Herdt, V.; Drechsler, R.
DOI: 10.23919/ICCAS55662.2022.10003719
2022 // conference-paper
Unlocking High Resolution Arithmetic Operations within Memristive Crossbars for Error Tolerant Applications
IEEE/IFIP International Conference on VLSI and System-on-Chip, VLSI-SoC
Datta, K.; Froehlich, S.; Shirinzadeh, S.; Yadav, D.N.; Sengupta, I.; Drechsler, R.
DOI: 10.1109/VLSI-SoC54400.2022.9939573
2022 // conference-paper
Polynomial Formal Verification of General Tree-Like Circuits
2022 China Semiconductor Technology International Conference, CSTIC 2022
Mahzoon, A.; Drechsler, R.
DOI: 10.1109/CSTIC55103.2022.9856884
2022 // conference-paper
Quality Assessment of RFET-based Logic Locking Protection Mechanisms using Formal Methods
Proceedings of the European Test Workshop
Merten, M.; Huhn, S.; Drechsler, R.
DOI: 10.1109/ETS54262.2022.9810459
2022 // conference-paper
Polynomial formal verification: ensuring correctness under resource constraints
IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD
Drechsler, R.; Mahzoon, A.
DOI: 10.1145/3508352.3561104
2022 // conference-paper
Polynomial-Time Formal Verification of Adder Circuits for Multiple-Valued Logic
Proceedings of The International Symposium on Multiple-Valued Logic
Niemann, P.; Drechsler, R.
DOI: 10.1109/ISMVL52857.2022.00009
2022 // journal-article
SymEx-VP: An open source virtual prototype for OS-agnostic concolic testing of IoT firmware
Journal of Systems Architecture
Tempel, S.; Herdt, V.; Drechsler, R.
DOI: 10.1016/j.sysarc.2022.102456
2022 // conference-paper
RISC-V Processor Verification with Coverage-guided Aging
MBMV 2022: Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen - 25. Workshop
Bruns, N.; Herdt, V.; Jentzsch, E.; Drechsler, R.
DOI:
2022 // conference-paper
ANN-based Performance Estimation of Embedded Software for RISC-V Processors
Proceedings - IEEE International Symposium on Rapid System Prototyping, RSP
Zhang, W.; Goli, M.; Mahzoon, A.; Drechsler, R.
DOI: 10.1109/RSP57251.2022.10039004
2022 // conference-paper
Simulation-based Verification of SystemC-based VPs at the ESL
MBMV 2022: Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen - 25. Workshop
Goli, M.; Drechsler, R.
DOI:
2022 // journal-article
Feed-Forward learning algorithm for resistive memories
Journal of Systems Architecture
Yadav, D.N.; Thangkhiew, P.L.; Datta, K.; Chakraborty, S.; Drechsler, R.; Sengupta, I.
DOI: 10.1016/j.sysarc.2022.102730
2022 // conference-paper
A Hardware-based Evolutionary Algorithm with Multi-Objective Optimization Operators for On-Chip Transient Fault Detection
Proceedings of the IEEE VLSI Test Symposium
Merten, M.; Huhn, S.; Drechsler, R.
DOI: 10.1109/VTS52500.2021.9794161
2022 // conference-paper
Adapting mutation and recombination operators to range-aware relations in real-world application data
GECCO 2022 Companion - Proceedings of the 2022 Genetic and Evolutionary Computation Conference
Plump, C.; Berger, B.J.; Drechsler, R.
DOI: 10.1145/3520304.3529066
2022 // conference-paper
Divider Verification Using Symbolic Computer Algebra and Delayed Don't Care Optimization
Proceedings of the 22nd Conference on Formal Methods in Computer-Aided Design, FMCAD 2022
Konrad, A.; Scholl, C.; Mahzoon, A.; Große, D.; Drechsler, R.
DOI: 10.34727/2022/isbn.978-3-85448-053-2-17
2022 // conference-paper
Next Generation Design For Testability, Debug and Reliability Using Formal Techniques
Proceedings - International Test Conference
Huhn, S.; Drechsler, R.
DOI: 10.1109/ITC50671.2022.00086
2022 // conference-paper
Formal verification of modular multipliers using symbolic computer algebra and boolean satisfiability
Proceedings - Design Automation Conference
Mahzoon, A.; Große, D.; Scholl, C.; Konrad, A.; Drechsler, R.
DOI: 10.1145/3489517.3530605
2022 // conference-paper
Towards Neural Hardware Search: Power Estimation of CNNs for GPGPUs with Dynamic Frequency Scaling
MLCAD 2022 - Proceedings of the 2022 ACM/IEEE Workshop on Machine Learning for CAD
Metz, C.A.; Goli, M.; Drechsler, R.
DOI: 10.1145/3551901.3556481
2022 // conference-paper
Investigating Various Adder Architectures for Digital In-Memory Computing Using MAGIC-based Memristor Design Style
2022 IEEE International Conference on Emerging Electronics, ICEE 2022
Jha, C.K.; Mahzoon, A.; Drechsler, R.
DOI: 10.1109/ICEE56203.2022.10117915
2022 // conference-paper
ML-based Power Estimation of Convolutional Neural Networks on GPGPUs
Proceedings - 2022 25th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2022
Metz, C.A.; Goli, M.; Drechsler, R.
DOI: 10.1109/DDECS54261.2022.9770153
2022 // conference-paper
Towards Polynomial Formal Verification of Complex Arithmetic Circuits
Proceedings - 2022 25th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2022
Drechsler, R.; Mahzoon, A.; Goli, M.
DOI: 10.1109/DDECS54261.2022.9770156
2022 // conference-paper
Verifying SystemC TLM peripherals using modern C++ symbolic execution tools
Proceedings - Design Automation Conference
Pieper, P.; Herdt, V.; Große, D.; Drechsler, R.
DOI: 10.1145/3489517.3530604
2022 // conference-paper
Design Modification for Polynomial Formal Verification
Proceedings - 2022 International Symposium on Electrical, Electronics and Information Engineering, ISEEIE 2022
Drechsler, R.; Mahzoon, A.
DOI: 10.1109/ISEEIE55684.2022.00040
2022 // conference-paper
Nearest Neighbor Mapping of Quantum Circuits to Two-Dimensional Hexagonal Qubit Architecture
Proceedings of The International Symposium on Multiple-Valued Logic
Datta, K.; Kole, A.; Sengupta, I.; Drechsler, R.
DOI: 10.1109/ISMVL52857.2022.00013
2021 // conference-paper
Polynomial Formal Verification of Prefix Adders
Proceedings of the Asian Test Symposium
Mahzoon, A.; Drechsler, R.
DOI: 10.1109/ATS52891.2021.00027
