2023 // book-chapter
Exploiting the Benefits of Clean Ancilla Based Toffoli Gate Decomposition Across Architectures
Abhoy Kole; Kamalika Datta; Philipp Niemann; Indranil Sengupta; Rolf Drechsler
2023 // conference-paper
Trojan-D2: Post-Layout Design and Detection of Stealthy Hardware Trojans-A RISC-V Case Study
Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC
Parvin, S.; Goli, M.; Torres, F.S.; Drechsler, R.
DOI: 10.1145/3566097.3567919
2023 // book-chapter
Polynomial Formal Verification of Complex Circuits Using a Hybrid Proof Engine
Alireza Mahzoon; Rolf Drechsler
2023 // conference-paper
VAST: Validation of VP-based Heterogeneous Systems against Availability Security Properties using Static Information Flow Tracking
Proceedings - International Symposium on Quality Electronic Design, ISQED
Coskun, E.N.D.; Hassan, M.; Goli, M.; Drechsler, R.
DOI: 10.1109/ISQED57927.2023.10129337
2023 // other
Finite State Automata Design using 1T1R ReRAM Crossbar
arXiv
Singh, S.; Ghazal, O.; Jha, C.K.; Rana, V.; Drechsler, R.; Shafik, R.; Yakovlev, A.; Patkar, S.; Merchant, F.
DOI: 10.48550/arXiv.2304.13552
2023 // conference-paper
EDDY: A Multi-Core BDD Package with Dynamic Memory Management and Reduced Fragmentation
Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC
Krauss, R.; Goli, M.; Drechsler, R.
DOI: 10.1145/3566097.3567913
Apr 2022 // journal-article
Through the Looking Glass: Automated Design Understanding of SystemC-Based VPs at the ESL
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Mehran Goli; Rolf Drechsler
2022 // journal-article
Unlocking approximation for in-memory computing with Cartesian genetic programming and computer algebra for arithmetic circuits
IT - Information Technology
Froehlich, S.; Drechsler, R.
DOI: 10.1515/itit-2021-0042
2022 // book
Polynomial Formal Verification of Arithmetic Circuits
Lecture Notes on Data Engineering and Communications Technologies
Drechsler, R.; Mahzoon, A.; Weingarten, L.
DOI: 10.1007/978-981-16-7182-1_36
2022 // conference-paper
Unlocking Sneak Path Analysis in Memristor Based Logic Design Styles
Proceedings - 2022 25th Euromicro Conference on Digital System Design, DSD 2022
Datta, K.; Shirinzadeh, S.; Thangkhiew, P.L.; Sengupta, I.; Drechsler, R.
DOI: 10.1109/DSD57027.2022.00111
2022 // journal-article
Template-based mapping of reversible circuits to IBM quantum computers
Microprocessors and Microsystems
Niemann, P.; de Almeida, A.A.A.; Dueck, G.; Drechsler, R.
DOI: 10.1016/j.micpro.2022.104487
2022 // conference-paper
Self-Explanation in Systems of Systems
Proceedings of the IEEE International Conference on Requirements Engineering
Fey, G.; Fränzle, M.; Drechsler, R.
DOI: 10.1109/REW56159.2022.00023
2022 // conference-paper
The Scale4Edge RISC-V Ecosystem
Proceedings of the 2022 Design, Automation and Test in Europe Conference and Exhibition, DATE 2022
Ecker, W.; Adelt, P.; Mueller, W.; Heckmann, R.; Krstic, M.; Herdt, V.; Drechsler, R.; Angst, G.; Wimmer, R.; Mauderer, A.; Stahl, R.; Emrich, K.; Mueller-Gritschneder, D.; Becker, B.; Scholl, P.; Jentzsch, E.; Schlamelcher, J.; Gruttner, K.; Bernardo, P.P.; Bringmann, O.; Damian, M.; Oppermann, J.; Koch, A.; Bormann, J.; Partzsch, J.; Mayr, C.; Kunz, W.
DOI: 10.23919/DATE54114.2022.9774593
2022 // conference-paper
SAT-based Exact Synthesis of Ternary Reversible Circuits using a Functionally Complete Gate Library
Proceedings - 2022 25th Euromicro Conference on Digital System Design, DSD 2022
Kole, A.; Datta, K.; Sengupta, I.; Drechsler, R.
DOI: 10.1109/DSD57027.2022.00108
2022 // conference-paper
Using density of training data to improve evolutionary algorithms with approximative fitness functions
2022 IEEE Congress on Evolutionary Computation, CEC 2022 - Conference Proceedings
Plump, C.; Berger, B.J.; Drechsler, R.
DOI: 10.1109/CEC55065.2022.9870352
2022 // conference-paper
Simulation-Based Debugging of Formal Environment Models
2022 30th Mediterranean Conference on Control and Automation, MED 2022
Meywerk, T.; Niedzwiecki, A.; Herdt, V.; Drechsler, R.
DOI: 10.1109/MED54222.2022.9837055
2022 // conference-paper
Preserving Design Hierarchy Information for Polynomial Formal Verification
IEEE/IFIP International Conference on VLSI and System-on-Chip, VLSI-SoC
Drechsler, R.; Mahzoon, A.
DOI: 10.1109/VLSI-SoC54400.2022.9939650
2022 // journal-article
Advanced virtual prototyping for cyber-physical systems using RISC-V: implementation, verification and challenges
Science China Information Sciences
Herdt, V.; Drechsler, R.
DOI: 10.1007/s11432-020-3308-4
2022 // conference-paper
Polynomial Formal Verification of Approximate Functions
Proceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI
Schnieber, M.; Froehlich, S.; Drechsler, R.
DOI: 10.1109/ISVLSI54635.2022.00029
2022 // conference-paper
Automated Detection of Spatial Memory Safety Violations for Constrained Devices
Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC
Tempel, S.; Herdt, V.; Drechsler, R.
DOI: 10.1109/ASP-DAC52403.2022.9712570
2022 // conference-paper
Virtual Prototype based Analysis of Neural Network Cache Behavior for Tiny Edge Device
Forum on Specification and Design Languages
Fratzer, A.; Herdt, V.; Luth, C.; Drechsler, R.
DOI: 10.1109/FDL56239.2022.9925663
2022 // conference-paper
3D Visualization of Symbolic Execution Traces
Forum on Specification and Design Languages
Zielasko, J.; Tempel, S.; Herdt, V.; Drechsler, R.
DOI: 10.1109/FDL56239.2022.9925664
2022 // conference-paper
Unified HW/SW Coverage: A Novel Metric to Boost Coverage-guided Fuzzing for Virtual Prototype based HW/SW Co-Verification
Forum on Specification and Design Languages
Bruns, N.; Herdt, V.; Drechsler, R.
DOI: 10.1109/FDL56239.2022.9925661
2022 // conference-paper
Early Performance Estimation of Embedded Software on RISC-V Processor using Linear Regression
Proceedings - 2022 25th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2022
Zhang, W.; Goli, M.; Drechsler, R.
DOI: 10.1109/DDECS54261.2022.9770144
2022 // conference-paper
Virtual Prototype driven Design, Implementation and Evaluation of RISC-V Instruction Set Extensions
Proceedings - 2022 25th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2022
Funck, M.; Herdt, V.; Drechsler, R.
DOI: 10.1109/DDECS54261.2022.9770108
