2022 // conference-paper
Mapping Quantum Circuits to 2-Dimensional Quantum Architectures
Lecture Notes in Informatics (LNI), Proceedings - Series of the Gesellschaft fur Informatik (GI)
Datta, K.; Kole, A.; Sengupta, I.; Drechsler, R.
DOI: 10.18420/inf2022_94
2022 // conference-paper
LiM-HDL: HDL-Based Synthesis for In-Memory Computing
Proceedings of the 2022 Design, Automation and Test in Europe Conference and Exhibition, DATE 2022
Froehlich, S.; Drechsler, R.
DOI: 10.23919/DATE54114.2022.9774627
2022 // journal-article
FAMCroNA: Fault Analysis in Memristive Crossbars for Neuromorphic Applications
Journal of Electronic Testing: Theory and Applications (JETTA)
Yadav, D.N.; Thangkhiew, P.L.; Datta, K.; Chakraborty, S.; Drechsler, R.; Sengupta, I.
DOI: 10.1007/s10836-022-06001-2
2022 // other
Simulation-based Verification of SystemC-based VPs at the ESL
arXiv
Goli, M.; Drechsler, R.
DOI:
2022 // conference-paper
Toward Optical Probing Resistant Circuits: A Comparison of Logic Styles and Circuit Design Techniques
Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC
Parvin, S.; Krachenfels, T.; Tajik, S.; Seifert, J.-P.; Torres, F.S.; Drechsler, R.
DOI: 10.1109/ASP-DAC52403.2022.9712518
2022 // journal-article
Advanced virtual prototyping for cyber-physical systems using RISC-V: implementation, verification and challenges
Science China Information Sciences
Herdt, V.; Drechsler, R.
DOI: 10.1007/s11432-020-3308-4
2022 // conference-paper
Efficient Cross-Level Processor Verification using Coverage-guided Fuzzing
Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI
Bruns, N.; Herdt, V.; Große, D.; Drechsler, R.
DOI: 10.1145/3526241.3530340
2022 // conference-paper
Equivalence Checking of System-Level and SPICE-Level Models of Linear Analog Filters
Proceedings - 2022 25th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2022
Caglar Coskun, K.; Hassan, M.; Drechsler, R.
DOI: 10.1109/DDECS54261.2022.9770142
2022 // conference-paper
Automated Detection of Spatial Memory Safety Violations for Constrained Devices
Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC
Tempel, S.; Herdt, V.; Drechsler, R.
DOI: 10.1109/ASP-DAC52403.2022.9712570
2022 // conference-paper
Virtual Prototype based Analysis of Neural Network Cache Behavior for Tiny Edge Device
Forum on Specification and Design Languages
Fratzer, A.; Herdt, V.; Luth, C.; Drechsler, R.
DOI: 10.1109/FDL56239.2022.9925663
2022 // conference-paper
3D Visualization of Symbolic Execution Traces
Forum on Specification and Design Languages
Zielasko, J.; Tempel, S.; Herdt, V.; Drechsler, R.
DOI: 10.1109/FDL56239.2022.9925664
2022 // conference-paper
Unified HW/SW Coverage: A Novel Metric to Boost Coverage-guided Fuzzing for Virtual Prototype based HW/SW Co-Verification
Forum on Specification and Design Languages
Bruns, N.; Herdt, V.; Drechsler, R.
DOI: 10.1109/FDL56239.2022.9925661
2022 // conference-paper
Early Performance Estimation of Embedded Software on RISC-V Processor using Linear Regression
Proceedings - 2022 25th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2022
Zhang, W.; Goli, M.; Drechsler, R.
DOI: 10.1109/DDECS54261.2022.9770144
2022 // conference-paper
Using density of training data to improve evolutionary algorithms with approximative fitness functions
2022 IEEE Congress on Evolutionary Computation, CEC 2022 - Conference Proceedings
Plump, C.; Berger, B.J.; Drechsler, R.
DOI: 10.1109/CEC55065.2022.9870352
2022 // conference-paper
Fast and Exact is Doable: Polynomial Algorithms in Test and Verification
2022 IEEE 23rd Latin American Test Symposium, LATS 2022
Drechsler, R.
DOI: 10.1109/LATS57337.2022.9936904
2022 // book
Choosing the Right Technique for the Right Restriction – A Domain-Specific Approach for Enforcing Search-Space Restrictions in Evolutionary Algorithms
Lecture Notes in Logistics
Plump, C.; Berger, B.J.; Drechsler, R.
DOI: 10.1007/978-3-031-05359-7_28
2022 // conference-paper
Advanced Environment Modeling and Interaction in an Open Source RISC-V Virtual Prototype
Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI
Pieper, P.; Herdt, V.; Drechsler, R.
DOI: 10.1145/3526241.3530374
2022 // conference-paper
Polynomial Formal Verification of Approximate Functions
Proceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI
Schnieber, M.; Froehlich, S.; Drechsler, R.
DOI: 10.1109/ISVLSI54635.2022.00029
2022 // journal-article
The MicroRV32 framework: An accessible and configurable open source RISC-V cross-level platform for education and research
Journal of Systems Architecture
Ahmadi-Pour, S.; Herdt, V.; Drechsler, R.
DOI: 10.1016/j.sysarc.2022.102757
2022 // conference-paper
RISC-V Processor Verification with Coverage-guided Aging
MBMV 2022: Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen - 25. Workshop
Bruns, N.; Herdt, V.; Jentzsch, E.; Drechsler, R.
DOI:
2022 // conference-paper
Simulation-Based Debugging of Formal Environment Models
2022 30th Mediterranean Conference on Control and Automation, MED 2022
Meywerk, T.; Niedzwiecki, A.; Herdt, V.; Drechsler, R.
DOI: 10.1109/MED54222.2022.9837055
2022 // conference-paper
Self-Explanation in Systems of Systems
Proceedings of the IEEE International Conference on Requirements Engineering
Fey, G.; Fränzle, M.; Drechsler, R.
DOI: 10.1109/REW56159.2022.00023
2022 // book
Polynomial Formal Verification of Arithmetic Circuits
Lecture Notes on Data Engineering and Communications Technologies
Drechsler, R.; Mahzoon, A.; Weingarten, L.
DOI: 10.1007/978-981-16-7182-1_36
2022 // conference-paper
SAT-based Exact Synthesis of Ternary Reversible Circuits using a Functionally Complete Gate Library
Proceedings - 2022 25th Euromicro Conference on Digital System Design, DSD 2022
Kole, A.; Datta, K.; Sengupta, I.; Drechsler, R.
DOI: 10.1109/DSD57027.2022.00108
2022 // conference-paper
Virtual Prototype driven Design, Implementation and Evaluation of RISC-V Instruction Set Extensions
Proceedings - 2022 25th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2022
Funck, M.; Herdt, V.; Drechsler, R.
DOI: 10.1109/DDECS54261.2022.9770108
