Wissenschaftsschwerpunkt der

© Jörg Sarbach
© Jörg Sarbach
Prof. Rolf Drechsler

Weitere Informationen:

AG Rechnerarchitektur & Zuverlässige Eingebettete Systeme; DFKI Cyber Physical Systems

Publikationen
Jun 2024 // conference-paper

Exploring the Potential of Decision Diagrams for Efficient In-Memory Design Verification

Khushboo Qayyum; Abhoy Kole; Kamalika Datta; Muhammad Hassan; Rolf Drechsler

2024 // journal-article

cecApprox: Enabling Automated Combinational Equivalence Checking for Approximate Circuits

IEEE Transactions on Circuits and Systems I: Regular Papers

Chandan Kumar Jha; Muhammad Hassan; Rolf Drechsler

Dec 2023 // conference-paper

PolyMiR: Polynomial Formal Verification of the MicroRV32 Processor

Lennart Weingarten; Kamalika Datta; Rolf Drechsler

Sep 2023 // conference-paper

Polynomial Formal Verification of KFDD Circuits

Martha Schnieber; Rolf Drechsler

Sep 2023 // conference-paper

Next-Generation Automatic Human-Readable Proofs Enabling Polynomial Formal Verification

Rolf Drechsler; Martha Schnieber

Sep 2023 // journal-article

Synergistic Verification of Hardware Peripherals through Virtual Prototype Aided Cross-Level Methodology Leveraging Coverage-Guided Fuzzing and Co-Simulation

Chips

Sallar Ahmadi-Pour; Mathis Logemann; Vladimir Herdt; Rolf Drechsler

Jul 2023 // conference-paper

Repetitive Processes and Their Surrogate-Model Congruent Encoding for Evolutionary Algorithms - A Theoretic Proposal

Christina Plump; Bernhard Berger; Rolf Drechsler

Jul 2023 // conference-paper

Scalable Neuroevolution of Ensemble Learners

Marcel Merten; Rune Krauss; Rolf Drechsler

Jul 2023 // journal-article

MARADIV: Library of MAGIC-Based Approximate Restoring Array Divider Benchmark Circuits for In-Memory Computing Using Memristors

IEEE Transactions on Circuits and Systems II: Express Briefs

Chandan Kumar Jha; Sallar Ahmadi-Pour; Rolf Drechsler

Jun 2023 // journal-article

Specification-Based Symbolic Execution for Stateful Network Protocol Implementations in IoT

IEEE Internet of Things Journal

Sören Tempel; Vladimir Herdt; Rolf Drechsler

2023 // other

Finite State Automata Design using 1T1R ReRAM Crossbar

arXiv

Singh, S.; Ghazal, O.; Jha, C.K.; Rana, V.; Drechsler, R.; Shafik, R.; Yakovlev, A.; Patkar, S.; Merchant, F.
DOI: 10.48550/arXiv.2304.13552

2023 // conference-paper

VAST: Validation of VP-based Heterogeneous Systems against Availability Security Properties using Static Information Flow Tracking

Proceedings - International Symposium on Quality Electronic Design, ISQED

Coskun, E.N.D.; Hassan, M.; Goli, M.; Drechsler, R.
DOI: 10.1109/ISQED57927.2023.10129337

2023 // journal-article

Improving the Designs of Nearest Neighbour Quantum Circuits for 1D and 2D Architectures

IETE Journal of Research

Bandyopadhyay, C.; Bhattacharjee, A.; Wille, R.; Drechsler, R.; Rahaman, H.
DOI: 10.1080/03772063.2020.1822215

2023 // book-chapter

Exploiting the Benefits of Clean Ancilla Based Toffoli Gate Decomposition Across Architectures

Abhoy Kole; Kamalika Datta; Philipp Niemann; Indranil Sengupta; Rolf Drechsler

2023 // conference-paper

A Class of Polynomially Verifiable Circuits of Logarithmic Depth

Proceedings of the 13th International Conference on Cloud Computing, Data Science and Engineering, Confluence 2023

Dominik, C.; Drechsler, R.
DOI: 10.1109/Confluence56041.2023.10048892

2023 // book-chapter

Improved Cost-Metric for Nearest Neighbor Mapping of Quantum Circuits to 2-Dimensional Hexagonal Architecture

Kamalika Datta; Abhoy Kole; Indranil Sengupta; Rolf Drechsler

2023 // conference-paper

Automated Equivalence Checking Method for Majority Based In-Memory Computing on ReRAM Crossbars

Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

Deb, A.; Datta, K.; Hassan, M.; Shirinzadeh, S.; Drechsler, R.
DOI: 10.1145/3566097.3567842

2023 // journal-article

Impact of sneak paths on in-memory logic design in memristive crossbars

IT - Information Technology

Datta, K.; Deb, A.; Kole, A.; Drechsler, R.
DOI: 10.1515/itit-2023-0020

2023 // conference-paper

Polynomial Formal Verification of a Processor: A RISC-V Case Study

Proceedings - International Symposium on Quality Electronic Design, ISQED

Weingarten, L.; Mahzoon, A.; Goli, M.; Drechsler, R.
DOI: 10.1109/ISQED57927.2023.10129397

2023 // conference-paper

Trojan-D2: Post-Layout Design and Detection of Stealthy Hardware Trojans-A RISC-V Case Study

Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

Parvin, S.; Goli, M.; Torres, F.S.; Drechsler, R.
DOI: 10.1145/3566097.3567919

2023 // book-chapter

Polynomial Formal Verification of Complex Circuits Using a Hybrid Proof Engine

Alireza Mahzoon; Rolf Drechsler

2023 // other

Lower Bound Proof for the Size of Bdds Representing a Shifted Addition

SSRN

Kleinekathöfer, J.; Mahzoon, A.; Drechsler, R.
DOI:

2023 // book

Formal verification of structurally complex multipliers

Formal Verification of Structurally Complex Multipliers

Mahzoon, A.; Große, D.; Drechsler, R.
DOI: 10.1007/978-3-031-24571-8

2023 // conference-paper

EDDY: A Multi-Core BDD Package with Dynamic Memory Management and Reduced Fragmentation

Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

Krauss, R.; Goli, M.; Drechsler, R.
DOI: 10.1145/3566097.3567913

Dec 2022 // journal-article

Towards Quantification and Visualization of the Effects of Concretization During Concolic Testing

IEEE Embedded Systems Letters

Soren Tempel; Vladimir Herdt; Rolf Drechsler