© Jörg Sarbach
© Jörg Sarbach
Prof. Rolf Drechsler

Weitere Informationen:

AG Rechnerarchitektur & Zuverlässige Eingebettete Systeme; DFKI Cyber Physical Systems

Ökosystem

Publikationen
2003 // Conference paper

Synthesizing checkers for on-line verification of system-on-chip designs

Proceedings - IEEE International Symposium on Circuits and Systems

Drechsler, R.

2003 // Conference paper

Using games for benchmarking and representing the complete solution space using symbolic techniques

Proceedings of The International Symposium on Multiple-Valued Logic

Fey, G.; Kinder, S.; Drechsler, R.

2002 // Journal article

A genetic algorithm for the minimization of OPKFDDs

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences

Jung, M.; Lee, G.; Park, S.; Drechsler, R.

2002 // Conference paper

Computing walsh, arithmetic, and reed-muller spectral decision diagrams using graph transformations

GLSVLSI 2002 - Proceedings of the 12th ACM Great Lakes Symposium on VLSI

Townsend, W.J.; Thornton, M.A.; Drechsler, R.; Miller, D.M.

2002 // Book

Crossing reduction by windows optimization

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Eschbach, T.; Günther, W.; Drechsler, R.; Becker, B.

2002 // Conference paper

Decision diagram optimization using copy properties

Proceedings - Euromicro Symposium on Digital System Design: Architectures, Methods and Tools, DSD 2002

Jankovic, D.; Stankovic, R.S.; Drechsler, R.

2002 // Journal article

Efficient algorithms for creation of linearly-independent decision diagrams and their mapping to regular layouts

VLSI Design

Perkowski, M.; Falkowski, B.; Chrzanowska-Jeske, M.; Drechsler, R.

2002 // Journal article

Efficient calculation of fixed-polarity polynomial expressions for multiple-valued logic functions

Proceedings of The International Symposium on Multiple-Valued Logic

Janković, D.; Stanković, R.S.; Drechsler, R.

2002 // Conference paper

Evaluation of static variable ordering heuristics for MDD construction

Proceedings of The International Symposium on Multiple-Valued Logic

Drechsler, R.

2002 // Journal article

Logic circuit equivalence checking using Haar spectral coefficients and partial BDDs

VLSI Design

Thornton, M.A.; Drechsler, R.; Günther, W.

2002 // Journal article

Low-power optimization techniques for BDD mapped circuits using temporal correlation

Canadian Journal of Electrical and Computer Engineering

Drechsler, R.; Kerttu, M.; Lindgren, P.; Thornton, M.

2002 // Journal article

Minimization of free BDDs

Integration, the VLSI Journal

Günther, W.; Drechsler, R.

2002 // Journal article

Minimization of word-level decision diagrams

Integration, the VLSI Journal

Drechsler, R.; Günther, W.; Höreth, S.

2002 // Conference paper

Minimizing the number of paths in BDDs

Proceedings - 15th Symposium on Integrated Circuits and Systems Design, SBCCI 2002

Fey, G.; Drechsler, R.

2002 // Conference paper

Multi-output timed Shannon circuits

Proceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI

Thornton, M.A.; Drechsler, R.; Miller, D.M.

2002 // Conference paper

On the construction of multiple-valued decision diagrams

Proceedings of The International Symposium on Multiple-Valued Logic

Miller, D.M.; Drechsler, R.

2002 // Conference paper

On the relation between SAT and BDDs for equivalence checking

Proceedings - International Symposium on Quality Electronic Design, ISQED

Reda, S.; Drechsler, R.; Orailoglu, A.

2002 // Conference paper

Reachability analysis for formal verification of SystemC

Proceedings - Euromicro Symposium on Digital System Design: Architectures, Methods and Tools, DSD 2002

Drechsler, R.; Grosse, D.

2002 // Conference paper

Recursive bi-partitioning of netlists for large number of partitions

Proceedings - Euromicro Symposium on Digital System Design: Architectures, Methods and Tools, DSD 2002

Drechsler, R.; Gunther, W.; Eschbach, T.; Linhard, L.; Angst, G.

2002 // Conference paper

RTL-datapath verification using integer linear programming

Proceedings - 7th Asia and South Pacific Design Automation Conference, 15th International Conference on VLSI Design, ASP-DAC/VLSI Design 2002

Brinkmann, R.; Drechsler, R.

2002 // Journal article

Switching activity estimation of finite state machines for low power synthesis

Proceedings - IEEE International Symposium on Circuits and Systems

Kerttu, M.; Lindgren, P.; Thornton, M.; Drechsler, R.

2002 // Conference paper

Utilizing BDDs for disjoint SOP minimization

Midwest Symposium on Circuits and Systems

Fey, G.; Drechsler, R.

2002 // Journal article

Verifying integrity of decision diagrams

Integration, the VLSI Journal

Drechsler, R.

2001 // Conference paper

Application of a hardware synthesis technique for database query optimization

IEEE Pacific RIM Conference on Communications, Computers, and Signal Processing - Proceedings

Komaragiri, V.; Thornton, M.A.; Drechsler, R.

2001 // Journal article

Binary decision diagrams in theory and practice

International Journal on Software Tools for Technology Transfer

Drechsler, R.; Sieling, D.